AMD system

Our AMD system contains a pre-production version of the 900 MHz Mobile Athlon 4 processor, based on the Palomino core, as well as 128 MB of memory. We were given documentation about PowerNow! $^{\text {TM}}$, the interface the chip uses for dynamically changing speed and voltage.

The chip indicates it is capable of five settings, shown in Table 2. We were unable to directly determine the power consumption of each setting since we lacked the necessary measurement equipment, so we estimate it using $P \propto V^2 f$. We assume a power consumption of 24 W at the maximum speed, as specified in the AMD data sheet [1].

Table 2: Characteristics of the AMD processor at various settings, with power and energy values approximated

Speed	Voltage	Power	Energy/	Efficiency
		(est.)	cyc (est.)	(est.)
500 MHz	1.25 V	10.6 W	21.3 nJ	7.6%
600 MHz	1.3 V	13.8 W	23.0 nJ	1.4%
700 MHz	1.35 V	17.4 W	24.8 nJ	-0.9%
800 MHz	1.4 V	21.3 W	26.7 nJ	-3.6%
900 MHz	1.4 V	24.0 W	26.7 nJ	N/A

We see that the 700 MHz and 800 MHz settings have negative efficiency, so they are not worthwhile. (It is not surprising that the 800 MHz setting is not worthwhile, since it has the same voltage as the 900 MHz setting, and thus the same energy consumption, but it runs more slowly.) Furthermore, the 600 MHz setting has rather low efficiency. With only three worthwhile settings, one of which is only barely worthwhile, we expect PACE to be largely ineffective.

We suspect that some settings have poor efficiency because AMD made overly conservative choices of maximum stable speed for certain voltages. One reason for this is that their current design requires processor speeds and voltages to attain only a certain set of values. More flexibility in either dimension would let them choose settings closer to the curve of maximum ideal efficiency.