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Experiments

This section demonstrates how we used the Performance Explorer to understand the performance behavior of a variant of the SPECjbb2000 benchmark on a PowerPC POWER4 machine.
Caches Size Line size Kind
L1 Instr. 32KB 128B direct mapped

L1 Data

64KB 128B 2-way set assoc.

L2 Unified

1.5MB 128B 8-way set assoc.

L3 local

32MB 512B 8-way set assoc.

L3 remote

32MB 512B 8-way set assoc.
POWER4 three levels of cache hierarchy.
 
  • POWER4
  • Experimental Methodology
  • Exploration
  • General Performance Trends
  • Memory Wall Issues
  • Discussion

  • Related WorkTopVisualization ToolExperiments