Check out the new USENIX Web site. next up previous
Next: About this document ... Up: Optimizing the Idle Task Previous: Analysis

Bibliography

1
Personal Communication with Steve Jobs.
1998.

2
Gerry Kane and Joe Heinrich.
MIPS RISC Architecture.
Prentice Hall, 1992.

3
Jochen Liedtke.
The performance of $\mu$-kernel-based systems.
In Proceedings of SOSP '97, 1997.

4
Henry Massalin.
Synthesis: An Efficient Implementation of Fundamental Operating System Services.
PhD thesis, Columbia University, 1992.

5
Larry McVoy.
lmbench: Portable tools for performance analysis.
In USENIX 1996 Annual Technical Conference. Usenix, 1996.

6
Motorola and IBM.
PowerPC 603 User's Manual.
Motorola, 1994.

7
Theodore Romer, Wayne, Ohlrich, Anna Karlin, and Brian Bershad.
Reducing tlb and memory overhead using online superpage promotion.
In Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995.

8
Ed Silha.
The PowerPC Architecture, IBM RISC System/6000 Technology, Volume II.
IBM Corp., 1993.

9
Richard L. Sits.
Alpha axp architecture.
Communications of the ACM, February 1993.

10
Mark Swanson, Leigh Stoller, and John Carter.
Increasing tlb reach using superpages backed by shadow memory.
In Computer Architecture News, 1998.

11
Madhusudhan Talluri, Mark D. Hill, and Yousef A. Khalidi.
A new page table for 64-bit address space.
In Proceedings of SOSP '95, 1995.

12
Shreekant S. Thakkar and Alan E. Knowles.
A high-performance memory management scheme.
IEEE Computer, May 1986.



Cort Dougan
1999-01-04