This paper has taken an important step towards the confluence of two emerging design considerations for ubiquitous and embedded computing: the need for a seamless and portable software platform for easy application design and interoperability, and the need for energy conscious system design. By focusing specifically on the Java runtime system and the SPEC JVM98 benchmarks, this paper has analyzed the energy consumption in the memory system for these applications. The motivation for this study stems from the observation that instructions accessing the memory system account for over 50% of the energy consumption for these benchmarks. As applications get larger and become more data centric, they are likely to stress the memory system even more.
Using an off-the-shelf JVM, a validated energy model for the memory system, and a detailed simulator, this paper has presented a characterization of the energy consumption in the cache and main memory due to instruction and data references of the SPEC JVM98 benchmarks. The effect of the JVM implementation style (interpretation or JIT compilation) has also been studied, in addition to breaking down the energy consumption between different software components of the JVM -- class loading, garbage collection, and dynamic compilation. The detailed profiles from this study can help towards hardware enhancements, in terms of cache and memory organization, and even algorithmic and software designs for energy conscious application and JVM designs.
This study has helped us make the following general observations:
We believe the characterization study in this paper will be helpful for JVM implementors to understand the impact of their decisions on the energy consumption of the system. As this paper is one of the first attempts to characterize energy-behavior of the Java codes, we believe there is lot of scope for enhancements. First, we need to experiment more thoroughly on the effect of data set sizes and with different types of Java applications executing on mobile environments. Second, we plan to study the impact of technology changes such as increased wire capacitances and leakage power on our study. We plan to address these in our future work.