2007 USENIX Annual Technical Conference
Pp. 29–43 of the Proceedings
Virtual Machine Memory Access Tracing with Hypervisor Exclusive Cache
Pin Lu and Kai Shen, University of Rochester
Abstract
Virtual machine (VM) memory allocation and VM consolidation can benefit
from the prediction of VM page miss rate at each candidate memory size.
Such prediction is challenging for the hypervisor (or VM monitor) due
to a lack of knowledge on VM memory access pattern. This paper
explores the approach that the hypervisor takes over the management
for part of the VM memory and thus all accesses that miss the remaining
VM memory can be transparently traced by the hypervisor.
For online memory access tracing, its overhead should be small
compared to the case that all allocated memory is directly managed by
the VM. To save memory space, the hypervisor manages its
memory portion as an exclusive cache (i.e., containing only
data that is not in the remaining VM memory). To minimize I/O
overhead, evicted data from a VM enters its cache directly from VM
memory (as opposed to entering from the secondary storage). We
guarantee the cache correctness by only caching memory pages whose
current contents provably match those of corresponding storage
locations. Based on our design, we show that when the VM evicts
pages in the LRU order, the employment of the hypervisor cache does
not introduce any additional I/O overhead in the system.
We implemented the proposed scheme on the Xen para-virtualization
platform.
Our experiments with microbenchmarks and four real data-intensive
services (SPECweb99, index searching, TPC-C, and TPC-H)
illustrate the overhead of our hypervisor cache and the accuracy
of cache-driven VM page miss rate prediction. We also present the
results on adaptive VM memory allocation with performance assurance.
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