Pp. 275–286 of the Proceedings

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Speeding Up Kernel Scheduler by Reducing Cache Misses
- Effects of cache coloring for a task structure -

Shuji YAMAMURA, Akira HIRAI, Mitsuru SATO,
Masao YAMAMOTO, Akira NARUSE, and Kouichi KUMON
Fujitsu Laboratories LTD
4-1-1, Kami-Kodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa-pref, Japan 211-8588
{yamamura, ahirai, msato, masao, naruse, kumon}@flab.fujitsu.co.jp

• Abstract
• 1 Introduction
• 2 Current Scheduler Issue
• 3 Our solution - cache coloring for a task structure -
  • 3.1 Implementation issue for coloring
  • 3.2 Our implementation for coloring
  • 3.3 Negative effect of cache coloring
• 4 Performance Evaluation
  • 4.1 Methods
  • 4.2 Results
  • 4.3 The relationship between the number of processes and the number of colorings
• 5 Scalability enhancement with coloring
  • 5.1 Experimental Environment and Benchmarks
  • 5.2 Result
    • 5.2.1 WebBench
    • 5.2.2 Chat
• 6 Related work
• 7 Conclusions
• Acknowledgments
• Bibliography