Dynamic clock frequency scaling and voltage scaling are two mechanisms that can reduce the power consumed by a computer. Both voltage scaling and frequency scaling are important; the power consumed by a component implemented in CMOS varies linearly with frequency and quadratically with voltage.
To evaluate the relative importance and the situations in which either is useful, it is necessary to consider energy, the integral of power over time. By reducing the frequency at which a component operates, a specific operation will consume less power but may take longer to complete. Although reducing the frequency alone will reduce the average power used by a processor over that period of time, it may not deliver a reduction in energy consumption overall, because the power savings are linearly dependent on the increased time. While greater energy reductions can be obtained with slower clocks and lower voltages, operations take longer; this exposes a fundamental tradeoff between energy and delay.
Many systems allow the processor clock to be varied. More recently, there are a number of processors that allow the processor voltage to be changed. For example, the StrongARM SA-2 processor, currently being designed by Intel, is estimated to dissipate 500mW at 600MHz, but only 40mW when running at 150MHz - a 12-fold energy reduction for a 4-fold performance reduction [1]. Likewise, the Pentium-III processor with SpeedStep technology dissipates 9W at 500MHz but 22W at 650MHz [2], AMD has added clock and voltage scaling to the AMD Mobile K6 Plus processor family and Transmeta has also developed processors with voltage scaling. Because of this tradeoff in speed vs. power, the decision of when to change the frequency or the voltage and frequency of such processors must be made judiciously while taking into account application demand and quality of user experience.
We believe that the decision to change processor speed and voltage must be controlled by the operating system. The operating system or similar system software is the only entity with a global view of resource usage and demand. Although it is clear that the operating system should control the scheduling mechanism, it is not clear what inputs are necessary to formulate the scheduling policy. There are two possible sources of information for policies. The application can estimate activity, providing information to the operating system about computation rates or deadlines, or the operating system can attempt to infer some policy for the applications from their behavior. These can be used separately or in concert to control voltage and processor speed.
A number of studies have investigated policies to automatically infer computation demands and adjust the processor accordingly. We have implemented those previously described algorithms; this paper describes our experience.
In the next section, we present some background material. We discuss related work in Section 3. In Section 4 we describe the schedulers we examine, our workload and our measurement methodology. We then discuss our results in Section 5.