Bibliography

1

IA-32 Intel® Architecture Software Developer's Manual.
http://developer.intel.com/design/pentium4/manuals.

2

Intel® Itanium Architecture Software Developer's Manual.
http://developer.intel.com/design/itanium/manuals.

3

SpecJVM98.
http://www.spec.org/osg/jvm98.

4

Toba.
http://www.cs.arizona.edu/sumatra/toba.

5

The Compaq Fast Virtual Machine, June 1999.
http://www.compaq.com/java/FastVM.html.

6

A.-R. Adl-Tabatabai, M. Cierniak, G.-Y. Lueh, V. M. Parikh, and J. M. Stichnoth.
Fast, effective code generation in a just-in-time java compiler.
In Proceedings of the ACM SIGPLAN '98 Conference on Programming Language Design and Implementation (PLDI'98), pages 280-290, June 1998.

7

B. Alpern, D. Attanasio, J. J. Barton, M. G. Burke, P. Cheng, J.-D. Choi, A. Cocchi, S. J. Fink, D. Grove, M. Hind, S. F. Hummel, D. Lieber, V. Litvinov, M. Mergen, T. Ngo, J. R. Russell, V. Sarkar, M. J. Serrano, J. Shepherd, S. Smith, V. C. Sreedhar, H. Srinivasan, and J. Whaley.
The Jalapeño virtual machine.
IBM System Journal, 39(1), Feb. 2000.

8

A. Appel and L. George.
Optimal spilling for CISC machines with few registers.
ACM SIGPLAN Notices, 36(5):243-253, May 2001.

9

P. Briggs, K. D. Cooper, and L. Torczon.
Improvements to graph coloring register allocation.
ACM Transactions on Programming Languages and Systems (TOPLAS), 16(3):428-455, May 1994.

10

G. J. Chaitin.
Register allocation & spilling via graph coloring.
In SIGPLAN '82 Symposium on Compiler Construction, pages 98-105, 1982.

11

F. C. Chow and J. L. Hennessy.
The priority-based coloring approach to register allocation.
ACM Transactions on Programming Languages and Systems, 12(4):501-536, Oct. 1990.

12

D. Detlefs and O. Agesen.
Inlining of virtual methods.
In R. Guerraoui, editor, Proceedings ECOOP'99, volume 1628 of LNCS, pages 258-278, Lisbon, Portugal, June 1999. Springer-Verlag.

13

L. George and A. W. Appel.
Iterated register coalescing.
ACM transacations on programming languages and systems., 18(3):300-324, May 1996.
also in POPL'96.

14

M. Kawahito, H. Komatsu, and T. Nakatani.
Effective null pointer check elimination utilizing hardware trap.
ACM SIGPLAN Notices, 35(11):139-149, Nov. 2000.

15

A. Krall and R. Grafl.
CACAO - A 64 bit JavaVM just-in-time compiler.
Concurrency: Practice and Experience, 9(11):1017-1030, 1997.

16

NaturalBridge.
Bullettrain.
http://www.naturalbridge.com.

17

M. Paleczney, C. Vick, and C. Click.
The Java HotSpot Server Compiler.
In Proceedings of First Usenix Java Virtual Machine Research and Technology Symposium, Apr. 2001.

18

D. A. Patterson.
Reduced instruction set computers.
Communications of the ACM, 28(1):8-21, Jan. 1985.

19

M. Poletto and V. Sarkar.
Linear scan register allocation.
ACM Transactions on Programming Languages and Systems, 21(5):895-913, Sept. 1999.

20

D. J. Scales, K. H. Randall, and S. G. J. Dean.
The Swift Java Compiler: Design and Implementation.
Technical Report 2, Compaq Western Research Laboratory, April 2000.

21

R. Sethi and J. D. Ullman.
The generation of optimal code for arithmetic expressions.
Journal of the ACM, 17(4):715-728, 1970.

22

K. Shudo.
shujit.
http://www.shudo.net/jit.

23

R. L. Sites and R. L. Witek.
Alpha AXP architecture reference manual.
Digital Press, 12 Crosby Drive, Bedford, MA 01730, USA, second edition, 1995.

24

T. Suganuma, T. Ogasawara, M. Takeuchi, T. Yasue, M. Kawahito, K. Ishizaki, H. Komatsu, and T. Nakatani.
Overview of the IBM Java Just-in-Time Compiler.
IBM Systems Journal, 39(1):175-193, ???? 2000.

25

B.-S. Yang, S.-M. Moon, S. Park, J. Lee, S. Lee, J. Park, Y. C. Chung, S. Kim, K. Ebcioglu, and E. Altman.
LaTTe: A Java VM just-in-time compiler with fast and efficient register allocation.
In Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques (PACT '99), pages 128-138, Newport Beach, California, Oct. 12-16, 1999. IEEE Computer Society Press.