1
K. Arnold and J. Gosling.
The Java Programming Language, Addison-Wesley, 1998, Second Edition.
2
F. Balasa, F. Catthoor, and H. De Man.
Exact evaluation of memory area for multi-dimensional processing systems.
In Proc. the IEEE International Conference on Computer Aided Design,
Santa Clara, CA, pages 669-672, November 1993.
3
B. D. Cahoon, and K. S. McKinley.
Tolerating latency by prefetching Java objects. In Proc. the Workshop on Hardware Support for Objects and
Microarchitectures for Java, October 10, 1999.
4
F. Catthoor, F. Franssen, S. Wuytack,
L. Nachtergaele, and H. DeMan.
Global communication and memory optimizing transformations for
low power signal processing systems.
In Proc. the IEEE Workshop on VLSI Signal Processing,
pages 178-187, 1994.
5
F. Catthoor, S. Wuytack, E. D. Greef, F. Balasa,
L. Nachtergaele, and A. Vandecappelle.
Custom memory management methodology - exploration of memory organization
for embedded multimedia system design.
Kluwer Academic Publishers, June, 1998.
6
Bob Cmelik and David Keppel.
Shade: A Fast Instruction-Set Simulator for Execution Profiling. In Proc.
ACM SIGMETRICS Conference on the Measurement and Modeling of Computer Systems,
pages 128-137, May 1994.
7
T. Cramer, R. Friedman, T. Miller, D. Seberger, R. Wilson,
M. Wolczko.
Compiling Java just in time. IEEE Micro, 17(3), pp. 36-43, May-June 1997.
8
V. Delaluz, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, and
M. J. Irwin.
DRAM energy management using software and hardware directed power mode control.
In Proc. International Conference on High Performance Computer Architecture,
Jan 2000, To appear.
9
S. Dieckmann and U. Holzle.
A Study of the allocation behavior of the SpecJVM98 Java benchmarks.
In Proc. ECOOP'99, 1999.
10
J. Flinn, G. Back, J. Anderson, K. Farkas, and D. Grunwald.
Quantifying the energy consumption of a pocket computer and a Java virtual machine.
In Proc. International Conference on Measurement and Modeling of Computer Systems,
Santa Clara, California, June 17-21, 2000.
11
K. Ghose and M. B. Kamble.
Reducing power in superscalar processor caches using subbanking,
multiple line buffers, and bit-line segmentation.
In Proc. 1999 International Symposium Low Power Electronics and Design,
1999, pages 70-75.
12
R. Gonzales and M. Horowitz. Energy dissipation
in general purpose processors. IEEE Journal of Solid-State
Circuits, 31(9):1277-1283, Sept 1996.
13
M. K. Gowan, L. L. Biro, and D. B. Jackson.
Power considerations in the desing of the Alpha 21264 microprocessor.
In Proc. the Design Automation Conference, San Francisco, CA, 1998.
14
M. J. Irwin and N. Vijaykrishnan. Low-power design: From
soup to nuts. Tutorial Notes, ISCA, 2000.
15
R. Jones and R. Lins.
Garbage Collection Algorithms for Automatic Dynamic Memory Management.
John Wiley and Sons, 1996.
16
M. B. Kamble and K. Ghose.
Analytical energy dissipation models for
low power caches. In Proc. International Symposium on Low Power
Electronics and Design, pages 143-148, 1997.
17
Jin-Soo Kim and Yarsun Hsu.
Memory system behavior of Java programs: Methodology and analysis.
In Proc. International Conference on Measurement and Modeling of Computer Systems,
Santa Clara, California, June 17-21, 2000.
18
A. Krall. Efficient Java VM Just-in-Time compilation.
In Proc. Parallel Architectures and Compilation Techniques, Paris, France, 1998.
19
T. Lindholm and F. Yellin.
The Java Virtual Machine Specification, Addison Wesley, 1997.
20
H. McGhan and M. O'Connor. PicoJava: A direct execution engine for
Java bytecode. IEEE Computer, pp. 22-30, October 1998.
21
J. Moreira, S. Midkiff, M. Gupta, P. Artigas, M. Snir, and R. Lawrence.
Java Programming for High-Performance Numerical Computing.
IBM Systems Journal, 39(2), 2000.
22
Anupama Murthy.
Memory System Characterization of Java Applications,
Masters Thesis, Dept. of Computer Science and Engineering, The Pennsylvania
State University, May 2000.
23
R. Radhakrishnan, N. Vijaykrishnan, L. K. John, and A. Sivasubramaniam.
Architectural issues in Java run-time systems. In Proc. International Conference on
High Performance Computer Architecture, pages 387-398, January 2000.
24
K. Roy and M. C. Johnson. Software design for low power.
Low Power Design in Deep Sub-micron Electronics, Kluwer Academic
Press, October 1996, Edt. J. Mermet and W. Nebel, pp. 433-459.
25
W-T. Shiue and C. Chakrabarti, Memory exploration for low power, embedded
systems, CLPE-TR-9-1999-20, Technical Report, Center for Low Power
Electronics, Arizona State University, 1999.
26
P. Song. Embedded DRAM finds growing niche.
Microprocessor Report, pages 19-23, August 4, 1997.
27
SpecJVM98 Benchmarks. https://www.spec.org/osg/jvm98
28
V. Sreedhar, M. Burke, and J. Choi.
A framework for interprocedural optimization in the presence of dynamic
class loading. In Proc. Programming Language Design and Implementation, Van Couver, Canada, 2000.
29
J. M. Stichnoth, G-Y. Lueh, and M. Cierniak.
Support for garbage collection at every instruction in a java compiler.
In Proc. Programming Language Design and Implementation, Atlanta, 1999.
30
C.-L. Su and A. M. Despain.
Cache design trade-offs for power and performance
optimization: A case study, In Proc. International Symposium on Low Power
Electronics and Design, pp. 63-68, 1995.
31
The Sun Labs Virtual Machine for Research. https://www.sun.com/research/java-topics
32
Ali-Reza Adl-Tabatabai et al. Fast, effective code generation in
a Just-in-Time Java compiler. In Proc. Programming Language Design and Implementation,
Montreal, Canada, 1998.
33
Memories are Forever, Technology Review, May-June 2000, pp. 28.
34
M. C. Toburen.
Power Analysis and Instruction Scheduling for Reduced di/dt in the Execution Core of High-Performance Microprocessors,
Master's Thesis, Dept. of Electrical and Computer Engineering,
North Carolina State University, Raleigh, NC, May 1999.
35
https://www.transmeta.com/articles/
36
N. Vijaykrishnan. Issues in the Design of a Java Processor
Architecture. Ph.D. thesis, College of Engineering, University of South
Florida, 1998.
37
N. Vijaykrishnan, M. Kandemir, M. J. Irwin, H. Y. Kim, and W. Ye.
Energy-driven integrated hardware-software optimizations using SimplePower.
In Proc. the International Symposium on Computer Architecture,
Vancouver, British Columbia, June 2000.
38
B-S. Yang, S-M. Moon, S. Park, J. Lee, S. Lee, J. Park, Y. C. Chung, S.
Kim, K. Ebcioglu, and E. Altman.
LaTTe: A Java VM just-in-time compiler with fast and efficient register allocation.
In Proc. International Conference on Parallel Architectures and Compilation Techniques, New Port Beach,
California, October 1999.
39
W. Ye. Architectural Level Power Estimation and Experimentation.
Ph.D. Thesis, Department of Computer Science and Engineering,
The Pennsylvania State University, October 1999.
